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  ASM3P2863a peak emi reducing solution ?2010 scillc. all rights reserved. p u blication order number: october 2010 C rev. 1.1 a sm3p2863/d fea tures generates an emi optimized clock signal at the o utput. integrated loop filter components. operates with a 3.3v / 2.5v supply. operating current less than 4ma. cmos design. input frequency: 12mhz generates a 1x low emi spread spectrum clock of the input frequency. frequency deviation: 0.4%(typ) @ 12mhz input frequency available in 6l-tsop (6l-tsot-23) package. product description the ASM3P2863a is a versatile spread spectrum fr equency modulator designed specifically for a wide range of clock frequencies. the ASM3P2863a reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of all clock dependent signals. the ASM3P2863a allows significant system cost savings by reducing the number of circuit board layers, ferrite beads and shielding that are traditionally required to pass emi regulations. the ASM3P2863a uses the most efficient and optimized modulation profile approved by the fcc and is implemented by using a proprietary all digital method. the ASM3P2863a modulates the output of a single pll in order to spread the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. this result in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequency generators. lowering emi by increasing a signals bandwidth is called spread spectrum clock generation. applications the ASM3P2863a is targeted towards all portable de vices with very low power requirements like mp3 players, notebooks and digital still cameras. key specifications description specification supply voltages v dd = 2.5v / 3.3v cycle-to-cycle jitter 200ps ( typ) output duty cycle 45/55% (worst case) modulation rate equation f in /256 frequency deviation 0.4 % (typ) @ 12mhz block diagram vss m o dout xout refout xin / clkin frequency divider feedback divider modulation phase detector loop filter vco out put divider pll vdd crystal oscillator
ASM3P2863a rev. 1 | page 2 of 7 | www.onsemi.com xin / clkin v dd refout modout xout 1 2 3 4 5 6 ASM3P2863a vss pin configuration (6l-tsop package) pin description pin# pin name type description 1 refout o buffered output of the input frequency. 2 xout o crystal connection. if using an external reference, this pin must be left unconnected. 3 xin / clkin i crystal connection or external reference frequency input. this pin has dual functions. it can be connected either to an external crystal or an external reference clock. 4 vdd p power supply for the entire chip. 5 modout o spread spectrum clock output. 6 vss p ground connection.
ASM3P2863a rev. 1 | page 3 of 7 | www.onsemi.com a bsolute maximum ratings symbol parameter rating unit vdd, v in voltage on any input pin with respect to ground -0.5 to +4.6 v t stg storage temperature -65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. operating conditions parameter description min max unit vdd supply voltage 2.375 3.6 v t a operating temperature (ambient temperature) 0 +70 c c l load capacitance 15 pf c in input capacitance 7 pf dc electrical characteristics for 2.5v supply symbol parameter min typ max unit v il input low voltage vss-0.3 0.8 v v ih input high voltage 2.0 vdd+0.3 v i il input low current -35 a i ih input high current 35 a i xol xout output low current (@ 0.5v, vdd = 2.5v) 3 ma i xoh xout output high current (@ 1.8v, vdd = 2.5v) 3 ma v ol output low voltage (vdd = 2.5v, i ol = 8ma) 0.6 v v oh output high voltage (vdd = 2.5v, i oh = 8ma) 1.8 v i dd static supply current 1 0.8 ma i cc dynamic supply current (2.5v, 12mhz and no load) 3 ma vdd operating voltage 2.375 2.5 2.625 v t on power-up time (first locked cycle after power-up) 5 ms z out output impedance 50 note: 1. xin / clkin pin is pulled low.
ASM3P2863a rev. 1 | page 4 of 7 | www.onsemi.com ac electrical characteristics for 2.5v supply symbol parameter min typ max unit clkin input frequency 12 mhz modout output frequency 12 mhz f d frequency deviation 0.4 % t lh 1 output rise time (measured from 0.7v to 1.7v) 0.5 1.5 1.7 ns t hl 1 output fall time (measured from 1.7v to 0.7v) 0.5 1.0 1.2 ns t jc jitter (cycle-to-cycle) 200 300 ps t d output duty cycle 45 50 55 % note: 1. t lh and t hl are measured into a capacitive load of 15pf. dc electrical characteristics for 3.3v supply symbol parameter min typ max unit v il input low voltage vss-0.3 0.8 v v ih input high voltage 2.0 vdd+0.3 v i il input low current -35 a i ih input high current 35 a i xol xout output low current (@ 0.4v, v dd = 3.3v) 3 ma i xoh xout output high current (@ 2.5v, v dd = 3.3v) 3 ma v ol output low voltage (vdd = 3.3v, i ol = 8ma) 0.4 v v oh output high voltage (vdd = 3.3v, i oh = 8ma) 2.5 v i dd static supply current 1 1 ma i cc dynamic supply current (3.3v, 12mhz and no load) 3.5 ma vdd operating voltage 3.0 3.3 3.6 v t on power-up time (first locked cycle after power-up) 5 ms z out output impedance 45 note: 1. xin / clkin pin is pulled low. ac electrical characteristics for 3.3v supply symbol para meter min typ max unit clkin input frequency 12 mhz modout output frequency 12 mhz f d frequency deviation 0.4 % t lh 1 output rise time (measured from 0.8 to 2.0v) 0.5 1.4 1.6 ns t hl 1 output fall time (measured at 2.0v to 0.8v) 0.4 1.0 1.2 ns t jc jitter (cycle-to-cycle) 200 300 ps t d output duty cycle 45 50 55 % note: 1. t lh and t hl are measured into a capacitive load of 15pf.
ASM3P2863a rev. 1 | page 5 of 7 | www.onsemi.com crystal specifications fundamental at cut parallel resonant crystal nominal frequency 12mhz frequency tolerance 50ppm or better at 25c operating temperature range -25c to +85c storage temperature -40c to +85c load capacitance (c p ) 18pf shunt capacitance 7pf maximum esr 25 w note: c l is load capacitance and rx is used to prevent oscillations at overtone frequency of the fundamental frequency. t ypical crystal interface circuit t ypical application schematic vss vdd 2.2f c2 modout modout clock ASM3P2863a 0.1f rs c1 vdd c l = 2*(c p C c s ), where c p = load capacitance of crystal from crystal vendor datasheet. c s = stray capacitance due to c in, pcb, trace, etc. c l rx c l crystal r xin xout
ASM3P2863a rev. 1 | page 6 of 7 | www.onsemi.com package information 6 l-tsop package symbol dimensions inches millimeters min max min max a 0.04 .. 1.00 a1 0.00 0.004 0.00 0.10 a2 0.033 0.036 0.84 0.90 b 0.012 0.02 0.30 0.50 h 0.005 bsc 0.127 bsc d 0.114 bsc 2.90 bsc b 0.06 bsc 1.60 bsc e 0.0374 bsc 0.950 bsc c 0.11 bsc 2.80 bsc l 0.0118 0.02 0.30 0.50 0 4 0 4
ASM3P2863a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. u.s patent pending; timing-safe and active bead are trademarks of pulsecore semiconductor, a wholly owned subsidiary of on semiconductor. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-344-3867 toll free usa/canada email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative or dering information part number marking package type temperature ASM3P2863af-06or v4l 6l-tsop (6l-tsot-23), tape & reel, pb free 0c to +70c a microdot placed at the end of last row of marking or just below the last row toward the center of package indicates pb-free.


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